All-in-One Design Checker

REV 1.0.1
Firebase Studio

Current Rev

Prior Rev

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BOM File

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EDIF Netlist File

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BOM File

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EDIF Netlist File

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Task List File (Optional)

All-in-One Design Checker User Guide

This guide provides instructions on how to use this comprehensive design verification utility.

1. Uploading Files

The tool has several upload slots to accommodate various analysis types. Provide the files needed for the checks you want to run.

  • EDIF Netlist (A/Old): The primary netlist for analysis (derating, test points, etc.) or the "old" version for comparison.
  • EDIF Netlist (B/New) (Optional): The "new" netlist for comparison against Netlist A.
  • BOM (A/Old) (Optional): The primary Bill of Materials for analysis (consolidation, NEO checks) or the "old" version for comparison.
  • BOM (B/New) (Optional): The "new" BOM for comparison against BOM A.
  • Task List (Optional): A .csv, .txt, or .xlsx file containing a list of engineering tasks to validate BOM changes against.

Click the DEMO button to load a complete set of sample files to see all features in action.

2. Running the Analysis

  • Once you have uploaded the necessary files, click the Run Analysis button.
  • The tool will perform all possible checks based on the files provided and display the results in a series of tabs.

3. Understanding the Results Tabs

The results are organized into tabs, each corresponding to a specific tool's functionality.

Final Check

  • Performs core design integrity checks:
  • DEKA Vault Verification: Ensures all parts are from the approved library.
  • BOM vs. Netlist Consistency: Cross-references your BOM and netlist.
  • Unconnected Input Pins: Finds floating input pins on ICs.
  • Bus Contention: Detects multiple output drivers on the same net.
  • Missing Decoupling Capacitors: Verifies that ICs have proper decoupling.

Derating

  • Displays derating information for Capacitors, Resistors, and Diodes.
  • Enter net voltages in the Nets sub-tab to calculate rail voltage, voltage margin, and power dissipation in real-time.
  • Use the Component Library sub-tab to manage diode working voltages.

BOM Compare

  • Shows the standard breakdown of Added, Removed, and Changed components between two BOMs.
  • Character-level differences are highlighted for easy identification.
  • An ECO Report is automatically generated, which can be annotated with tasks from your uploaded list.

Netlist Compare

  • Provides a detailed comparison between two netlist files, including statistics on added/removed/modified Cells, Instances, and Nets.
  • The Visual Diff offers a filterable, line-by-line comparison of the files.

BOM Consolidation

  • Identifies part consolidation opportunities in your BOM.
  • FFF (Form-Fit-Function), Potential, and Duplicate part number groups are shown.
  • Use the interactive merge workflow to consolidate parts, which automatically generates Schematic and Layout tasks, as well as an Altium Automation Script.

Footprint Consolidation

  • Analyzes your BOM and groups components by Case Size, then lists all unique Footprints used for each size, helping you spot inconsistencies.

NEO BOM Checker

  • Validates a BOM against specific NEO project requirements, such as correct footprints for certain components, approved revision states, and the presence of ACL numbers.
  • Provides a summary of all errors and warnings found.

Net & Test Point Analysis

  • A collection of tabs for detailed netlist inspection:
  • Stats: High-level statistics on net counts and test point coverage.
  • Nets & Test Points: A full list of all nets and their test point status.
  • Connectors: Pinouts and ESD protection status for all connectors.
  • Bus Analysis: Automatically detects and analyzes SPI, I2C, JTAG, and UART buses.
  • Power: Analyzes power rails, connected ICs, and calculates current/power consumption.
  • Net Classes: Lists all members of each net class defined in the design.

About

  • Contains this User Guide, a detailed Requirements document, and a Change Log.